A priori formal coverage analysis for protocol properties

P Tiwari, S Biswas, RS Mitra�- …�on VLSI Design held jointly with�…, 2006 - ieeexplore.ieee.org
P Tiwari, S Biswas, RS Mitra
19th International Conference on VLSI Design held jointly with 5th�…, 2006ieeexplore.ieee.org
Protocol compliance verification is a key component of the overall SOC verification process.
Formal techniques have been applied to achieve high confidence in such verification, but
the quality of the protocol properties themselves is not subjected to this rigor of verification.
Determining the formal coverage of the protocol properties with respect to an
implementation is not sufficient, because it may not have captured the full scope of the
protocol. We propose a technique to solve this important problem, by formally covering a�…
Protocol compliance verification is a key component of the overall SOC verification process. Formal techniques have been applied to achieve high confidence in such verification, but the quality of the protocol properties themselves is not subjected to this rigor of verification. Determining the formal coverage of the protocol properties with respect to an implementation is not sufficient, because it may not have captured the full scope of the protocol. We propose a technique to solve this important problem, by formally covering a protocol's properties independent of the implementation. The coverage is determined with respect to the protocol specification (i.e. its semantics), which is captured as a state transition graph (STG). Developing an STG for a complex protocol is a non-trivial task; in this paper we also propose techniques to efficiently model complex protocol features like pipelining and threading. Results for OCP and AHB are shown to illustrate our approach.
ieeexplore.ieee.org
Showing the best result for this search. See all results