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{{Semiconductor manufacturing processes}} |
{{Semiconductor manufacturing processes}} |
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The '''"28 nm" lithography process''' is a half-node [[semiconductor manufacturing]] process based on a die shrink of the [[32 nm process|"32 nm" lithography process]].<ref>{{Cite conference | |
The '''"28 nm" lithography process''' is a half-node [[semiconductor manufacturing]] process based on a die shrink of the [[32 nm process|"32 nm" lithography process]].<ref>{{Cite conference |=Torres |=J. Andres |last2=Otto |first2=Oberdan |last3=Pikus |first3=Fedor G. |date=2009-10-01 |editor-last=Zurbrick |editor-first=Larry S. |editor2-last=Montgomery |editor2-first=M. Warren |title=Challenges for the 28nm half node: Is the optical shrink dead? |url=https://www.researchgate.net/publication/ |conference=Society of Photographic Instrumentation Engineers |pages=74882A |doi=10.1117/12.831047}}</ref> It appeared in production in 2010.<ref>{{Cite web |title=A Review of TSMC 28 nm Process Technology {{!}} TechInsights |url=https://www.techinsights.com/blog/review-tsmc-28-nm-process-technology |access-date=2024-03-01 |website=www.techinsights.com}}</ref> |
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Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit;<ref name="urlNo More Nanometers – EEJournal">{{cite web |url=https://www.eejournal.com/article/no-more-nanometers/ |title=No More Nanometers – EEJournal |date=July 23, 2020 |format= }}</ref> neither gate length, metal pitch or gate pitch on a "28nm" device is twenty-eight nanometers.<ref>{{cite web|url=https://www.design-reuse.com/articles/43316/a-brief-history-of-process-node-evolution.html|title=A Brief History of Process Node Evolution|last=Shukla|first=Priyank|website=design-reuse.com|access-date=2019-07-09}}</ref><ref>{{cite web|url=https://www.extremetech.com/computing/184946-14nm-7nm-5nm-how-low-can-cmos-go-it-depends-if-you-ask-the-engineers-or-the-economists|title=14nm, 7nm, 5nm: How low can CMOS go? It depends if you ask the engineers or the economists...|last=Hruska|first=Joel|website=[[ExtremeTech]]}}</ref><ref>{{cite web|url=https://wccftech.com/intel-losing-process-lead-analysis-7nm-2022/|title=Exclusive: Is Intel Really Starting To Lose Its Process Lead? 7nm Node Slated For Release in 2022|website=wccftech.com|date=2016-09-10}}</ref><ref>{{cite web|url=https://www.eejournal.com/article/life-at-10nm-or-is-it-7nm-and-3nm/|title=Life at 10nm. (Or is it 7nm?) And 3nm - Views on Advanced Silicon Platforms|website=eejournal.com|date=2018-03-12}}</ref> |
Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit;<ref name="urlNo More Nanometers – EEJournal">{{cite web |url=https://www.eejournal.com/article/no-more-nanometers/ |title=No More Nanometers – EEJournal |date=July 23, 2020 |format= }}</ref> neither gate length, metal pitch or gate pitch on a "28nm" device is twenty-eight nanometers.<ref>{{cite web|url=https://www.design-reuse.com/articles/43316/a-brief-history-of-process-node-evolution.html|title=A Brief History of Process Node Evolution|last=Shukla|first=Priyank|website=design-reuse.com|access-date=2019-07-09}}</ref><ref>{{cite web|url=https://www.extremetech.com/computing/184946-14nm-7nm-5nm-how-low-can-cmos-go-it-depends-if-you-ask-the-engineers-or-the-economists|title=14nm, 7nm, 5nm: How low can CMOS go? It depends if you ask the engineers or the economists...|last=Hruska|first=Joel|website=[[ExtremeTech]]}}</ref><ref>{{cite web|url=https://wccftech.com/intel-losing-process-lead-analysis-7nm-2022/|title=Exclusive: Is Intel Really Starting To Lose Its Process Lead? 7nm Node Slated For Release in 2022|website=wccftech.com|date=2016-09-10}}</ref><ref>{{cite web|url=https://www.eejournal.com/article/life-at-10nm-or-is-it-7nm-and-3nm/|title=Life at 10nm. (Or is it 7nm?) And 3nm - Views on Advanced Silicon Platforms|website=eejournal.com|date=2018-03-12}}</ref> |
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Some models of the [[PS3]] use a RSX 'Reality Synthesizer' chip manufactured using a "28nm" process.<ref>{{Cite web |title=NVIDIA RSX-28nm |url=https://www.techpowerup.com/gpu-specs/nvidia-rsx-28nm.g928}}</ref> |
Some models of the [[PS3]] use a RSX 'Reality Synthesizer' chip manufactured using a "28nm" process.<ref>{{Cite web |title=NVIDIA RSX-28nm |url=https://www.techpowerup.com/gpu-specs/nvidia-rsx-28nm.g928}}</ref> |
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FPGAs produced with "28 nm" process technology include models of the Xilinx Artix 7 FPGAs and Altera Cyclone V FPGAs.<ref>{{Cite |
FPGAs produced with "28 nm" process technology include models of the Xilinx Artix 7 FPGAs and Altera Cyclone V FPGAs.<ref>{{Cite |=Homulle |=Harald |last2=Charbon |first2=Edoardo |=Performance characterization of Altera and Xilinx 28 nm FPGAs at cryogenic temperatures |url=://ieeexplore.ieee.org/document/8280117 |publisher=IEEE |pages=25–31 |doi=10.1109/FPT.2017.8280117 |isbn=978-1-5386-2656-6|date=2017-12-13}}</ref> |
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== References == |
== References == |
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Revision as of 11:52, 17 March 2024
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MOSFET scaling (process nodes) |
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Future
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The "28 nm" lithography process is a half-node semiconductor manufacturing process based on a die shrink of the "32 nm" lithography process.[1] It appeared in production in 2010.[2]
Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit;[3] neither gate length, metal pitch or gate pitch on a "28nm" device is twenty-eight nanometers.[4][5][6][7]
Taiwan Semiconductor Manufacturing Company has offered "28 nm" production using high-K metal gate process technology.[8]
GlobalFoundries offers a "28nm" foundry process called the "28SLPe" ("28nm Super Low Power") foundry process, which uses high-K metal gate technology.[9]
Design
"28nm" requires twice the number of design rules for ensuring reliability in manufacturing as "80nm".[10]
Shipped devices
AMD's Radeon HD 7970 uses a graphics processing unit manufactured using a "28nm" process.[11]
Some models of the PS3 use a RSX 'Reality Synthesizer' chip manufactured using a "28nm" process.[12]
FPGAs produced with "28 nm" process technology include models of the Xilinx Artix 7 FPGAs and Altera Cyclone V FPGAs.[13]
References
- ^ Torres, J. Andres; Otto, Oberdan; Pikus, Fedor G. (2009-10-01). Zurbrick, Larry S.; Montgomery, M. Warren (eds.). Challenges for the 28nm half node: Is the optical shrink dead?. Society of Photographic Instrumentation Engineers. pp. 74882A. doi:10.1117/12.831047.
- ^ "A Review of TSMC 28 nm Process Technology | TechInsights". www.techinsights.com. Retrieved 2024-03-01.
- ^ "No More Nanometers – EEJournal". July 23, 2020.
- ^ Shukla, Priyank. "A Brief History of Process Node Evolution". design-reuse.com. Retrieved 2019-07-09.
- ^ Hruska, Joel. "14nm, 7nm, 5nm: How low can CMOS go? It depends if you ask the engineers or the economists..." ExtremeTech.
- ^ "Exclusive: Is Intel Really Starting To Lose Its Process Lead? 7nm Node Slated For Release in 2022". wccftech.com. 2016-09-10.
- ^ "Life at 10nm. (Or is it 7nm?) And 3nm - Views on Advanced Silicon Platforms". eejournal.com. 2018-03-12.
- ^ Clarke, Peter (2009-08-24). "TSMC splits 28-nm high-k metal gate process into two versions". EE Times.
- ^ "GlobalFoundries 130, 55, 45, 40, 28, 22, 12nm Prototyping and Volume Production" (PDF).
- ^ Balasinski, Artur (2014). Design for manufacturability: from 1D to 4D for 90-22nm technology nodes. New York, New York: Springer. p. 124. ISBN 978-1-4614-1761-3.
- ^ Smith, Ryan. "AMD Radeon HD 7970 Review: 28nm And Graphics Core Next, Together As One". www.anandtech.com. Retrieved 2024-03-01.
- ^ "NVIDIA RSX-28nm".
- ^ Homulle, Harald; Charbon, Edoardo (2017-12-13). "Performance characterization of Altera and Xilinx 28 nm FPGAs at cryogenic temperatures". 2017 International Conference on Field Programmable Technology (ICFPT). IEEE. pp. 25–31. doi:10.1109/FPT.2017.8280117. ISBN 978-1-5386-2656-6.